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Multi-Bus Architecture for a Video Codec

[Category : - Audio - Video]
[Viewed 34 times]

Embodiments of the present invention relate to a multi-bus architecture within a video codec that discretely and efficiently transports video components within the codec. This multi-bus architecture provides a relatively more efficient transport mechanism because the various buses are designed to specifically address unique characteristics of the video components or parameters being processed within the codec.


Financial information

Our patented Video CODEC has the lowest power dissipation (25 mW) and lowest latency (698 uS) in the industry.







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